A) Field of the Invention
The present invention relates to a compound semiconductor epitaxial substrate, a compound semiconductor device and their manufacture method, and more particularly to a compound semiconductor epitaxial substrate and a compound semiconductor device having a nitride semiconductor layer, and their manufacture method.
B) Description of the Related Art
GaN has a broad band gap of 3.4 eV and is a semiconductor expected for short wavelength optical emission and high breakdown voltage operation. Optical emission devices for ultraviolet and blue light have been developed. High voltage operation is required for a base station amplifier of mobile phones. A value over 300 V is presently reported as a breakdown voltage during current-off. The best output characteristics are obtained by using an SiC substrate. This is considered to be ascribed to a high thermal conductivity of SiC. Physical characteristics such as a band gap are adjusted in group-III nitride mixed crystals. For example, AN or InN is mixed in GaN. GaxAlyInzN (0<x≦1, x+y+z=1) is herein called gallium nitride containing (GaN containing) semiconductor. Various epitaxial growth has been studied in order to form a group-III nitride semiconductor crystal layer of good quality.
JP-A-2003-309071 proposes that an AlN low temperature growth buffer layer of 10 nm to 50 nm thick is grown on a crystal substrate such as sapphire, SiC, GaN and AlN, e.g., a sapphire substrate, at a low temperature of 300° C. to 600° C., after the temperature is raised to, e.g, 1000° C. an AlxGa1-xN (0<x≦1) underlying layer is grown on the low temperature growth buffer layer, and an AlyGa1-yN (0≦y<x) with a lower Al composition is grown on the underlying layer. Since the AlGaN film with a lower Al composition has a large lattice constant, a compressive stress is applied. It is described that a GaN layer and the like of good quality can be obtained because dislocation is deflected laterally at a film interface. The device structure described is an ultraviolet emission LED. When a multiquantum well structure is formed, a growth temperature is set to 800° C. for example.
JP-A-2005-32823, which is incorporated herein by reference, proposes that when a field effect transistor epitaxial wafer is formed by growing an AlN buffer layer on an SiC substrate and growing a GaN or InGaN channel layer and an AlGaN electron supply layer on the AlN buffer layer, a growth temperature of the buffer layer is set higher by about 100° C. than that for the channel layer, and a V/III ratio is lowered during the growth to the extent that adhesion and release speeds of AlN reactive species become equal, preferably not smaller than 50 and not larger than 500.
As the growth temperature is raised, AlN reactive species are activated so that release become easy. As the V/III ratio is lowered, a growth speed of the AlN buffer layer is suppressed low, and a state near an equilibrium state is formed in which AlN reactive species become easy to move on the surface. Therefore, not only two-dimensional nucleation is promoted but also a pit burying function is enhanced after the AlN crystal film is formed. It is described that growth of an AlN buffer layer with less detects can be realized. The AlN buffer layer is grown by MOCVD under the conditions of a furnace pressure of 135 Torr, a V/III ratio of 230 and a growth temperature of 1150° C. to 1200° C. using trimethylaluminum (TMA) as Al source and NH3 as nitrogen source. A growth speed is 0.2 nm/sec or slower. Thereafter, the temperature is lowered to 1100° C., and other layers such as a high purity GaN layer are grown epitaxially.
JP-A-2006-165207, which is incorporated herein by reference, proposes a high electron mobility transistor (HEMT) of high breakdown voltage using GaN containing semiconductor as a channel layer. For example, an i-type GaN channel layer is grown above a high resistance SiC substrate, an n-type AlGaN layer and an n-type GaN cap layer are formed with an i-type AlGaN spacer layer interposed therebetween, the n-type cap layer is partially removed, Ta and Al are laminated to form source/drain electrodes of ohmic electrodes through annealing at 510° C. or higher and lower than 600° C., an SiN layer is deposited, an opening is formed through the SiN layer, and a gate electrode contacting the GaN cap layer is formed in the opening.